型号: | SN74LS73ANSE4 | 厂家: | TI/德州仪器 |
封装: | PDIP | 系列: | 模拟和逻辑IC |
描述: | Flip Flop JK-Master-Slave Type Neg-Edge 2-Element 14-Pin PDIP Tube | ||
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SN74LS73ANSE4
产品类别 | 双稳态触发器 |
型号 | SN74LS73ANSE4 |
描述 | Flip Flop JK-Master-Slave Type Neg-Edge 2-Element 14-Pin PDIP Tube |
厂家 | TI/德州仪器 |
Logic Family | LS |
Logic Function | JK-Master-Slave Type |
Number of Elements per Chip | 2 |
Number of Element Inputs | 2 |
Number of Element Outputs | 1 |
Process Technology | Bipolar |
Polarity | Inverting/Non-Inverting |
Triggering Type | Negative-Edge |
Maximum Low Level Output Current - (mA) | 8 |
Maximum High Level Output Current - (mA) | -0.4 |
Minimum Operating Supply Voltage - (V) | 4.75 |
Maximum Operating Supply Voltage - (V) | 5.25 |
Packaging | Tube |
Number of Channels per Chip | 2 |
Rad Hard | No |
Pin Count | 14 |
Supplier Package | PDIP |
Standard Package Name | DIP |
CECC Qualified | No |
ESD Protection | Unknown |
Military | No |
AEC Qualified | No |
Auto motive | No |
P PAP | No |
ECCN Code | EAR99 |
SVHC | No |
SVHC Exceeds Threshold | No |
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